Study of the Extended p Dual Source Structure for Eliminating Bipolar Induced Breakdown in Submicron SOI MOSFET
نویسنده
چکیده
Simulation results on a novel extended p dual source SOI MOSFET are reported. It is shown that the presence of the extended p region on the source side, which can be fabricated using the post-low-energy implanting selective epitaxy (PLISE), significantly suppresses the parasitic bipolar transistor action resulting in a large improvement in the breakdown voltage. Our results show that when the length of the extended p region is half the channel length, the improvement in breakdown voltage is about 120% when compared to the conventional SOI MOSFET’s.
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